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PC104 Series
PC104-3300



General Specifications  

General Specifications
• Chip
HFC-SP ISDN S/T HDLC base rate controller
Independent Read and Write HDLC-Channels for one ISDN D-Channel


FIFO-Size
2x512 Byte (D-channel)
max. 15 HDLC frames (D-channel) per channel and direction in
FIFO
56 kbit/s restricted mode for U.S. ISDN lines selectable


full I.430 ITU S/T ISDN support in TE and NT mode for 3.3V and 5V supply
B1+B2 HDLC mode
only 2 I/O address used on ISA-PC bus
one of 7 interrupt channels on ISA-PC bus selectable by software
Timer with interrupt and watchdog capability in processor mode

 
   
         
 
 
 
 
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